Research project · under heavy development

A data-to-GPU highway.

Kylix is research into a data-to-GPU highway for Rust. Model weights and data move from storage and the network straight into GPU memory, with no proxy and no extra copy, and Tokio applications drive NVIDIA CUDA directly. One design, from small edge devices to multi-GPU clusters.

  • Storage to GPU
  • Network to GPU
  • Tokio to CUDA
Designed for Edge devices from Jetson Orin Nano class Multi-GPU servers GPU clusters
The problem

Where loading time goes today.

On the way from storage to the GPU, model weights and inference data usually make several stops. Each stop adds a copy, CPU work or waiting, and the GPU waits until the data has arrived. These are the bottlenecks this research goes after.

Loading a model

  1. Object storeremote bucketBottlenecks12
  2. Local diskstaging copyBottleneck3
  3. Page cachekernel memoryBottleneck4
  4. CPUparse, convert, sliceBottlenecks56
  5. Pinned bufferhost stagingBottleneck7
  6. GPU memoryfinally usable

Feeding data to a running model

  1. Storage or networkfiles, servicesBottlenecks18
  2. Socket bufferskernel memoryBottleneck9
  3. CPUdecode, re-packBottleneck5
  4. Pinned bufferhost stagingBottleneck7
  5. GPU memorycontext fills upBottleneck10

Serving at scale

  1. Stored modelsversions, replicasBottlenecks1112
  2. One central storeshared by everyoneBottleneck13
  3. Many GPU nodesstarting at once

The research target

  1. Storage or networklocal disk or other nodes
  2. GPU memoryone hop, no proxy, no host copy
  1. A proxy in the pathBytes pass through a gateway or proxy server, which adds a hop, a copy and that server's CPU limit.
  2. One stream at a timeA single connection or sequential reads often use only a fraction of a fast network card or an array of SSDs.
  3. Download, then loadThe whole file is written to local disk before loading starts. Nothing overlaps, and every byte is written once and read again.
  4. Kernel copyOrdinary reads copy every byte from the operating system's page cache into the application's memory.
  5. CPU unpackingTensors and inputs are parsed, converted or re-laid out on the CPU, often on one thread, while the GPU waits.
  6. Slicing at load timeCheckpoints are not laid out per GPU, so each GPU's share is cut out while loading, from slices that are not aligned for direct reads.
  7. Bounce bufferThe GPU's copy engines read only from page-locked memory, so ordinary memory is first copied into a staging buffer before it crosses PCIe.
  8. Small filesDatasets and retrieval corpora kept as millions of small files spend their time on lookups, not on moving bytes.
  9. Socket copyData arriving over the network is copied out of kernel buffers into the application before it can go to the GPU.
  10. Context overflowWhen the cached context (the KV cache) of long or many conversations outgrows GPU memory, it is dropped and recomputed, or reloaded through the same slow path.
  11. Copies of the same bytesModel versions that share identical weights are stored and moved again in full.
  12. Three full replicasData at rest is often protected by three complete copies, which triples the raw capacity it needs.
  13. Everyone pulls at onceWhen many GPUs start the same model, they all download it from one central store, which becomes the choke point.
The research

Remove the stops, not just speed them up.

Everything below is a design target of an active research project. The numbers are goals the design is measured against.

The data-to-GPU path

  • Storage to GPU

    Weights are stored the way GPUs read them, so each GPU loads only its own share as a plain read: no page-cache copy and no unpacking on the CPU. On servers it is designed for GPUDirect Storage, from NVMe straight into GPU memory. On edge devices, where CPU and GPU share one memory, the read is designed to land where the GPU can use it directly.

    Targets4567

  • Network to GPU

    Data that is not on the machine arrives from several nodes in parallel, with no server in between. On GPU servers it is designed to go straight from the network card into GPU memory with GPUDirect RDMA, with every byte still verified, so loading runs while the data arrives and a local copy is kept for the next start. Without RDMA it takes one copy through host memory. The goal is at least 70% of the slower of the network card and the SSDs.

    Targets12313and9over RDMA

  • No silent detours

    A machine that cannot put bytes straight into GPU memory says so, instead of quietly copying through host memory. What the system reports about its data path stays true on every machine.

    Targets7

Storage built for AI

  • One engine for AI data

    Model weights, datasets and live data share one storage engine, with one approach to durability and repair. Datasets are kept in large objects in open formats, so reading them moves bytes instead of looking up millions of files.

    Targets8

  • No metadata bottleneck

    Coordination grows with the number of objects, not with their size, so it stays small and consistent as data grows. The same design is meant to work from a single edge device to petabytes on a GPU cluster.

  • Capacity that pays off

    Data moves to cheaper tiers as it ages. In clusters with enough nodes or racks to spread it across, data that no longer changes is protected with less than half the raw capacity of three full copies. Weights shared between model versions are stored only once.

    Targets1112

The end goal

Tokio to CUDA, without the seams.

The goal is a Rust application on Tokio that works with NVIDIA GPUs as naturally as with files and sockets. Data arrives in GPU memory through the same async runtime that serves requests, GPU work is awaited like any other task, and the kernels are Rust too.

The first experiments on the host-to-GPU path used CUDA C++ called from async Rust over FFI. The current work moves that code to NVIDIA's CUDA Rust.

  • GPU work as async tasksTransfers and kernels are started and awaited from Tokio like any other task, so loading, serving and I/O share one async runtime.
  • One language, end to endThe storage engine, the network fetch, the GPU kernels and the application are all Rust on Tokio, with io_uring for storage I/O and no C++ layer in between.
  • Mistakes caught at compile timeGPU memory and the transfers that use it are designed as Rust types, so mistakes such as freeing memory a transfer still uses are caught when compiling, not in production.
  • Built on CUDA RustNVIDIA's CUDA platform for Rust: GPU kernels and the host code that drives them, both written in Rust. NVIDIA introduced it in September 2026 and calls it early-stage, not yet production-ready. github.com/NVIDIA/cuda-rust · announcement
  • Under heavy developmentKylix is a private, non-commercial research project. Designs change as measurements come in.
Get in touch

Let's talk.

Kylix is a research project under heavy development. We welcome conversations with researchers, infrastructure engineers and hardware makers who care about how fast data reaches the GPU.

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